Your
previous QPSK Simulink Exercise assumed you knew the phase of the transmitted carrier. Unfortunately, this is not the case in practice.
The carrier phase is unknown and must be extracted from the received signal using a carrier phase recovery
subsystem. In this exercise, you will design the carrier phase recovery subsystem for QPSK which will be used to
process QPSK modulated data contained in the file
qpskcruwdata.matTo deal with the 90-degree phase ambiguity of the carrier phase synchronizer, we will use the
unique word method. In the UW method, you must search the demodulator output for four versions of the UW that
correspond to the four possible constellation rotations defined by the phase ambiguity. Once the UW has been
found, the phase ambiguity is known and can be corrected.
| normalized symbol rate: normalized carrier frequency: pulse shape:
average energy: carrier phase: symbol clock offset: input file: input message length: phase ambiguity resolution: input message length:
| 0.125 symbols/sample 0.3 cycles/sample square-root raised cosine roll-off = 0.5 length = 16 symbols 2 Watt-seconds unknown 0 sec qpskcruwdata.mat84 symbols (168 bits) unique word: UW = 11 10 10 11 10 01 00 00 DATA = 168 bits
|
This packet is repeated approximately 4 times.
The detector design should start with the QPSK detector from the
previous QPSK Simulink Exercise. As we discussed in the class, the system you are designing should look like this.
Design the phase detector and loop filter using blocks form the Simulink, Communications, and DSP
Blockset libraries. I used the following settings in my design (these values are normalzed to the symbol
rate):
normalized bandwidth: damping factor:
| 0.01 (normalized to the symbol rate) 1
|
| 1 | Incorporate the carrier recovery subsystem and differential decoder into a QPSK detector.
|
| 2 | For the detector input, use the From File block and set the Filename to qpskcruwdata.mat
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| 3 | Set the simulation parameters as follows: Start Time: Stop Time: Solver options
Fixed step size:
| 0.0 (8+8+84+8)*8*4 Type: Fixed-step discrete (no continuous states) auto
|
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| 5 | The detector produces 433 decisions. Even though the UW and DATA fields are repeated 4 times, the PLL doesn't lock until part way through the first
transmission.
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| 6 | To find the data symbols, look for the 8 symbols corresponding to the four possible rotations of theUW pattern. Once you find it, the following 84 symbols correspond to 24 7-bit
ASCII characters.
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| 7 | Plot the phase error for the PLL and use the plot to estimate how long (measured in symbols) it
took for your PLL to lock. Print this plot and either email with your final submission (preferred method)
or turn it in to the Simulink TA.
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| 8 | Determine the message using either your matlab script or the on-line ASCII table.
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| 9 | Email your answer to ee485ta "at" ee.byu.edu. Attach to your email message, the simulink model file (.mdl) that contains your detector
design.
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| 10 | Plot the eye diagram and the scatter plot used for symbol decisions. You may either attach the
plots to your email message (preferred method) or turn in the plots at the beginning of the next class
period.
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ECEn 485 Simulink Exercise Page.