Design an OQPSK detector using blocks from the SIMULINK Block Library and the Communications
Blockset.
The temptation is to modify a QPSK detector by delaying the inphase branch one-half of a symbol time.
But, this will not work in the absence of carrier phase synchronization.
The proper structure is illustrated below.
The matched filter outputs are downsampled to two samples/symbol (or one sample/bit)
in synchronism with the symbols.
The samples are commutated as shown.
After commutation, the clock rate is one sample/symbol, the even- and odd-indexed
samples appearing in parallel.
Detection is based on the even-indexed samples from the I-channel and the odd-indexed
samples from the Q-channel.
The unused samples will be used for carrier phase synchronization as explained in
the Simulink exercise on
Carrier Phase Synchronization for OQPSK.
More information on this structure is available in Section 5.4 of the text.
The system requires a commutator.
The data samples arrive at the input at a rate equivalent to 2 samples/symbol
and are output in two parallel streams at a symbol rate equivalent to 1 sample/symbol.
The commutator may be constructed in Simulink using a pair of downsample blocks
with different sample offsets and a delay as shown below.
(The delay is required to properly align the even- and odd-indexed samples.)
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